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/**************************************************************************** * 文件名：PWM.C * 功能：使用PWM6输出PWM信号 ****************************************************************************/ #include

/******************************************** 本程序通过2407的pwm单元产生带有死区的pwm波形 *********************************************/ #include "register.h" initial() { asm(" setc INTM "); asm(" setc SXM

/******************************************** 本程序使用2407的pwm单元产生非对称的pwm波形, 用来测试所有的PWM输出。 *********************************************/ #include "register.h" initial() { asm(" setc INTM ");

/***************************************** 本程序使用2407的pwm模块实现多路输出pwm波形 ******************************************/ #include "register.h" initial() { asm(" setc INTM "); asm(" setc SXM ");

/******************************************** 本程序使用2407的pwm单元，产生对称的pwm波形 *********************************************/ #include "register.h" initial() { asm(" setc INTM "); asm(" setc SXM

set -tmpdir . set -overwrite YES run -ifmt VERILOG -top pwm -p xc2s100-pq208-5 -ifn pwm.prj -opt_mode Speed -opt_level 1 -check_attribute_syntax YES -keep_hierarchy No -glob_opt AllClockNet

Release 6.3i - Bitgen G.35 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. Loading device database for application Bitgen from file "pwm.ncd". "pwm" is an NCD, version 2.38, device xc2s

insert `timescale 1ns/1ns include include pwm.v include c:/xilinx_webpack/verilog/src/iSE/unisim_comp.v

JDF G // Created by Project Navigator ver 1.0 PROJECT pwm DESIGN pwm DEVFAM spartan3 DEVFAMTIME 1146140698 DEVICE xc3s400 DEVICETIME 1146140698 DEVPKG pq208 DEVPKGTIME 1146140698 DEVSPEED -4

verilog work pwm.v