代码搜索：PLA
找到约 1,334 项符合「PLA」的源代码
代码结果 1,334
www.eeworm.com/read/233882/14129357
asm pla1a.asm
;**********************************************************************
; pla1a.asm :
; This procedure implements a simple AND-OR PLA with:
;
; 8 inputs := A7 A6 A5 A4 A3 A2 A1 A
www.eeworm.com/read/130765/14174904
asm pla1a.asm
;**********************************************************************
; pla1a.asm :
; This procedure implements a simple AND-OR PLA with:
;
; 8 inputs := A7 A6 A5 A4 A3 A2 A1 A
www.eeworm.com/read/225258/14547418
asm pla1a.asm
;**********************************************************************
; pla1a.asm :
; This procedure implements a simple AND-OR PLA with:
;
; 8 inputs := A7 A6 A5 A4 A3 A2 A1 A
www.eeworm.com/read/119064/14841717
asm pla1a.asm
;**********************************************************************
; pla1a.asm :
; This procedure implements a simple AND-OR PLA with:
;
; 8 inputs := A7 A6 A5 A4 A3 A2 A1 A
www.eeworm.com/read/219311/14888714
asm pla1a.asm
;**********************************************************************
; pla1a.asm :
; This procedure implements a simple AND-OR PLA with:
;
; 8 inputs := A7 A6 A5 A4 A3 A2 A1 A
www.eeworm.com/read/463239/1538936
v pla_plane.v
vti_encoding:SR|utf8-nl
vti_timelastmodified:TR|12 Jun 2002 19:12:02 -0000
vti_extenderversion:SR|5.0.2.4330
vti_lineageid:SR|{D2BFFAB7-B213-42B4-95C6-2958E0E9D330}
vti_cacheddtm:TX|12 Jun 2002 19
www.eeworm.com/read/463239/1538939
v pla_array.v
vti_encoding:SR|utf8-nl
vti_timelastmodified:TR|12 Jun 2002 19:11:20 -0000
vti_extenderversion:SR|5.0.2.4330
vti_lineageid:SR|{359B79BA-4F57-4BA8-A0D3-65AA374E0E7A}
vti_cacheddtm:TX|12 Jun 2002 19
www.eeworm.com/read/463239/1538941
v pla_plane.v
module PLA_plane (in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2);
input in0, in1, in2, in3, in4, in5, in6, in7;
output out0, out1, out2;
reg out0, out1, out2;
reg [0:
www.eeworm.com/read/463239/1538944
v pla_array.v
module PLA_array (in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2);
input in0, in1, in2, in3, in4, in5, in6, in7;
output out0, out1, out2;
reg out0, out1, out2;
reg [0:
www.eeworm.com/read/268818/4249920
v pla_plane.v
vti_encoding:SR|utf8-nl
vti_timelastmodified:TR|12 Jun 2002 19:12:02 -0000
vti_extenderversion:SR|5.0.2.4330
vti_lineageid:SR|{D2BFFAB7-B213-42B4-95C6-2958E0E9D330}
vti_cacheddtm:TX|12 Jun 2002 19