代码搜索:PCI-Express

找到约 24 项符合「PCI-Express」的源代码

代码结果 24
www.eeworm.com/read/198532/7930775

readme

This is the Linux device driver released for RealTek Ethernet controllers, which are listed as following. 1. RTL8169S/SB/SC (Gigabit Ethernet
www.eeworm.com/read/425905/10310428

cap-msi-mapping

0a:01.0 PCI bridge: Broadcom HT2100 PCI-Express Bridge (rev a2) (prog-if 01 [Subtractive decode]) 00: 66 11 40 01 47 00 10 00 a2 01 04 06 40 00 01 00 10: 00 00 00 00 00 00 00 00 0a 0b 0b 00 51 51 00 2
www.eeworm.com/read/248703/12545539

cap-msi-mapping

0a:01.0 PCI bridge: Broadcom HT2100 PCI-Express Bridge (rev a2) (prog-if 01 [Subtractive decode]) 00: 66 11 40 01 47 00 10 00 a2 01 04 06 40 00 01 00 10: 00 00 00 00 00 00 00 00 0a 0b 0b 00 51 51 00 2
www.eeworm.com/read/152843/5662999

h qla_devtbl.h

#define QLA_MODEL_NAMES 0x44 /* * Adapter model names. */ static char *qla2x00_model_name[QLA_MODEL_NAMES] = { "QLA2340", /* 0x100 */ "QLA2342", /* 0x101 */ "QLA2344", /* 0x102 */ "QCP2
www.eeworm.com/read/152843/5661965

makefile

# # Makefile for PCI-Express PORT Driver # pcieportdrv-y := portdrv_core.o portdrv_pci.o portdrv_bus.o obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o
www.eeworm.com/read/278404/4146010

f board_rtl_x04_ncv.f

// PCI-Express Test Bench //--------------------------------- ../board.v ../sys_clk_gen.v ../sys_clk_gen_ds.v // PCI-Express 4 Lane Endpoint Reference Design //-------------------------------------
www.eeworm.com/read/412543/2167123

f board_rtl_x04_ncv.f

// PCI-Express Test Bench //--------------------------------- ../board.v ../sys_clk_gen.v ../sys_clk_gen_ds.v // PCI-Express 4 Lane Endpoint Reference Design //-------------------------------------
www.eeworm.com/read/412543/2167233

f board_rtl_x01_ncv.f

// PCI-Express Test Bench //--------------------------------- ../board.v ../sys_clk_gen.v ../sys_clk_gen_ds.v // PCI-Express 1 Lane Endpoint Reference Design //-------------------------------------
www.eeworm.com/read/278404/4146006

f run.f

//-f ./unisims.f //-f ./simprims.f ../sim_define.v ../board_common.v // PCI-Express 1 Lane Endpoint Reference Design //---------------------------------------------- ../../example_design