代码搜索结果

#Allegro PCB Router V15.7 made 2006/05/31 at 22:07:34 #Host #ROUTING STATUS > Start Time: Report Time: Wed May 27 09:45:38 2009 Nets =

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Concept\project1\worklib\root\physical\gerber.scr # start time: Wed Jun 20 12:37:08 2001 version 14.0 setwindow pcb new newdr

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Capture\Allegro\4plc.scr # start time: Wed Apr 04 16:01:26 2001 version 14.0 setwindow pcb open fillin "assigned.brd" setwin

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Capture\Allegro\2constraints.scr # start time: Fri Apr 06 05:39:29 2001 version 14.0 setwindow pcb open fillin "netin.brd" c

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Capture\Allegro\9silk.scr # start time: Mon Apr 16 15:19:10 2001 version 14.0 setwindow pcb open fillin "final.brd" color

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Capture\Allegro\drill.scr # start time: Wed Apr 18 15:13:29 2001 version 14.0 setwindow pcb open fillin "artwork.brd" zoom f

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Capture\Allegro\7planes.scr # start time: Mon Apr 16 14:56:22 2001 version 14.0 setwindow pcb status setwindow form.status F

# Allegro script # file: D:\Develop\PSD140\140AllegroFoundation\Capture\Allegro\1capnetin.scr # start time: Fri Apr 06 05:34:23 2001 version 14.0 setwindow pcb open fillin "master.brd" net

# Allegro script # file: D:\Develop\PSD142\142AdvancedAllegro\1Customizing\macro4.scr # start time: Mon Apr 15 19:29:31 2002 version 14.2 setwindow pcb trapsize 1889 # Macro file: coordinates

#include #include #define getpch(type) (type *)malloc(sizeof(type)) #define NULL 0 using namespace std; const int que_num = 5; //就绪队列数 struct pcb{ //进程控制块 char nam