代码搜索：Numeric
找到约 7,754 项符合「Numeric」的源代码
代码结果 7,754
www.eeworm.com/read/394482/8222030
cpp list9-7.cpp
#include
#include
#include
#include
using namespace std;
void main(void)
{
clock_time X(3,10);
clock_time Y(0,05);
clock_time Z(0,95);
www.eeworm.com/read/393485/8283097
cpp ex290_db2.cpp
#include
using namespace std;
#include
#define OTL_DB2_CLI // Compile OTL 4.0/DB2 CLI
#define OTL_STRICT_NUMERIC_TYPE_CHECK_ON_SELECT
#include // include the OT
www.eeworm.com/read/174072/9609004
cpp ex290_db2.cpp
#include
using namespace std;
#include
#define OTL_DB2_CLI // Compile OTL 4.0/DB2 CLI
#define OTL_STRICT_NUMERIC_TYPE_CHECK_ON_SELECT
#include // include the OT
www.eeworm.com/read/432836/8568671
vhd tb_moteur_test.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
USE ieee.numeric_std.ALL;
ENTITY tb_Moteur_test IS
END tb_Moteur_test;
ARCHITECTURE behavior OF tb_Moteur_test IS
www.eeworm.com/read/387009/8712244
h dynpro.h
VecInt dynpro(const VecInt &nstate,
Doub cost(Int jj, Int kk, Int ii)) {
const Doub BIG = 1.e99;
static const Doub EPS=numeric_limits::epsilon();
Int i, j ,k, nstage = nstate.size() - 1;
www.eeworm.com/read/387009/8712354
h dfridr.h
template
Doub dfridr(T &func, const Doub x, const Doub h, Doub &err)
{
const Int ntab=10;
const Doub con=1.4, con2=(con*con);
const Doub big=numeric_limits::max();
const Doub
www.eeworm.com/read/371615/9546058
bak pwm.vhd.bak
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity pwm is
port(
clk,reset:in std_logic;
w:in std_logic_vector(3 downto 0);
pwm:out std_logic
);
end pwm;
www.eeworm.com/read/350014/10776466
vhd sinetest4ksample500hzsignal.vhd
library ieee;
use ieee.std_logic_1164.all;
--use ieee.numeric_std.all;
use ieee.std_logic_arith.all;
entity SineTest4KSample500HzSignal is
end entity SineTest4KSample500HzSignal;
architectur
www.eeworm.com/read/271074/11009514
vhd fsm.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.Constants.all;
entity FSM is
port (reset, clk : in std_logic;
strobe : out std_logic;
sample : out std_logic;
www.eeworm.com/read/431705/7132964
vhd sine_wave_tb.vhd
-- Test bench created by tb_gen_vhdl.pl
-- Copyright Doulos Ltd
-- SD, 10 May 2002
library IEEE;
use IEEE.Std_logic_1164.all;
use IEEE.Numeric_Std.all;
use work.sine_package.all;
entity sin