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nzp_logic.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
entity NZP_LOGIC is
port (
Clock : in std_logic;
Reset : in std_logic;
LD_CC : in std_logic;
bus_in : i
jtag_logic.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
jtag_logic.vhd
-------------------------------------------------------------------------------
-- Serial/Parallel converter, interfacing JTAG chain with FTDI FT245BM
-----------------------------------------------
jtag_logic.txt
-------------------------------------------------------------------------------
-- Serial/Parallel converter, interfacing JTAG chain with FTDI FT245BM
-----------------------------------------------