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Logic Analyzer 的代码
gh_r_2_polar_a.vhd
-----------------------------------------------------------------------------
-- Filename: gh_r_2_polar_a.vhd
--
-- Description:
-- uses the cordic algorithm to preform rectangular to polar conve
gh_r_2_polar_28.vhd
-----------------------------------------------------------------------------
-- Filename: gh_r_2_polar_28.vhd
--
-- Description:
-- uses the cordic algorithm to preform rectangular to polar conv
gh_fir_filter.vhd
---------------------------------------------------------------------
-- Filename: gh_FIR_filter.vhd
--
-- Description:
-- FIR Filter
--
-- Copyright (c) 2006, 2007 by George Huber
-- an
gh_fir_filter_fg.vhd
---------------------------------------------------------------------
-- Filename: gh_FIR_filter_fg.vhd
--
-- Description:
-- FIR Filter with full generics
--
-- Copyright (c) 2007 by George
gh_tvfd_filter.vhd
---------------------------------------------------------------------
-- Filename: gh_TVFD_filter.vhd
--
-- Description:
-- Time Varying Fractional Delay Filter
--
-- Copyright (c) 2005, 20
gh_pwm.vhd
-----------------------------------------------------------------------------
-- Filename: gh_PWM.vhd
--
-- Description:
--
-- Copyright (c) 2009 by George Huber
-- an OpenCores.org Project
-
gh_wdt.vhd
-----------------------------------------------------------------------------
-- Filename: gh_wdt.vhd
--
-- Description:
-- watch dog timer
--
-- Copyright (c) 2008 by George Huber
-- an Ope
gh_mux_4to1.vhd
-----------------------------------------------------------------------------
-- Filename: gh_MUX_4to1.vhd
--
-- Description:
-- a 4 to 1 mux
--
-- Copyright (c) 2005 by George Huber
-- an
gh_jkff.vhd
-----------------------------------------------------------------------------
-- Filename: gh_jkff.vhd
--
-- Description:
-- a JK Flip-Flop
--
-- Copyright (c) 2005 by George Huber
-- an Ope
decoder_3_8.vhd
library ieee;
use ieee.std_logic_1164.all;
entity decoder_3_8 is
port(a,b,c,g1,g2a,g2b:in std_logic;
y:out std_logic_vector(7 downto 0));
end decoder_3_8;
architecture rtl of decoder_3_8