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Logic Analyzer 的代码
logic_legxbr.htm
I/O Style - OD - OpenDrain
- PU - Pullup
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent la
logic_legxbr.htm
I/O Style - OD - OpenDrain
- PU - Pullup
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent la
control_logic.v
/*
//*************************************************************************
// Project Name: 8255A的功能设计和分析
// Module Name : Control_Logic
// Author: 张文涛
// Created: 2006
xw_logic.v
module xw_logic(pwm_i,up_stop,down_stop,mot_sign,pwm_driver);
input pwm_i;
input up_stop;
input down_stop;
input mot_sign;
output pwm_driver;
reg pwm_driver;
reg[1:0] ttp;
always @(pwm_i
xw_logic.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to