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Logic Analyzer 的代码
jtag_logic.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
jtag_logic.vhd
-------------------------------------------------------------------------------
-- Serial/Parallel converter, interfacing JTAG chain with FTDI FT245BM
-----------------------------------------------
main_logic.c
void Main_Logic(void)
{
/*
***************************************************************
定义局部变量
***************************************************************
*/
uint16 i=0,j=0,cou
logic_legxbr.htm
I/O Style - OD - OpenDrain
- PU - Pullup
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent la