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Logic Analyzer 的代码
logic.clw
; CLW file contains information for the MFC ClassWizard
[General Info]
Version=1
LastClass=CLogicDialog
LastTemplate=CDialog
NewFileInclude1=#include "stdafx.h"
NewFileInclude2=#include "Logic
logic.dsp
# Microsoft Developer Studio Project File - Name="Logic" - Package Owner=
# Microsoft Developer Studio Generated Build File, Format Version 6.00
# ** DO NOT EDIT **
# TARGTYPE "Win32 (x86) App
logic.txt
/L20"LOGIC" Line Comment = ; Nocase Block Comment On = ; Block Comment Off = ; File Extensions = DCB
/Delimiters = ~!@$%^&*()+=|\/{}[]:;"' ,.?/
/C1
BOOLEAN-EQUATIONS
end
flow-table
function-
logic.mem
@0
d0 aa d1 55 d2 ff 51 32 e1 aa 00 d1 ff d2 00 51
32 e1 aa 00 d1 aa d0 aa d2 00 51 32 e1 aa 00 d1
00 d0 ff d2 ff 51 32 e1 aa 00 d1 00 d0 ff 59 31
e1 aa 00 d2 ff d0 00 5a 32 e1 aa 00 d2 aa d
logic.asm
;----------------------------------------------------------
; Test for xor, not, shr, shl, cmp, asr, ror, rorc
;----------------------------------------------------------
org 0x0000
ldi
logic.v
`timescale 1ns / 10ps
module logic(wb_clk_i, wb_rst_i, wb_adr_i, wb_dat_i, wb_dat_o, wb_we_i,
wb_stb_i, wb_cyc_i, wb_ack_o);
input wb_clk_i;
input wb_rst_i;
input [1:0] wb_adr_i;
logic.pt
port theport vars rw0:data1, rw1:data2, r2:out1, r3:out2;
input [:] data1, data2;
output [:] out1, out2;
assign out1 = data1 & data2;
assign out2 = data1 | data2;
logic.h
/*
*
*
*
*/
#ifndef __BUILTIN_LOGIC_H
#define __BUILTIN_LOGIC_H
#include "itemlist.h"
void LoadLogic(ItemList & list);
void LogicalHelp();
//
//
//
#define TRUE 200
#define FALSE 201
#define
logic.cpp
/*
*
*
*
*/
#include
#include "logic.h"
#include "interpreter.h"
using namespace std;
//
//
//
void LoadLogic(ItemList & list)
{
list.Add(new Operation(TRUE, "true", 0));
list.Add(