代码搜索：LCD转VGA
找到约 10,000 项符合「LCD转VGA」的源代码
代码结果 10,000
www.eeworm.com/read/398287/7105113
bsf vga.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/463939/7172498
h vga.h
#ifndef _VGA_H_
#define _VGA_H_
#define __REGb(x) (*(volatile unsigned char *)(x))
#define IICCON __REGb(0x54000000)
#define IICSTAT __REGb(0x54000004)
#define IICADD __REGb(0x54000008)
#def
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o vga.o
www.eeworm.com/read/457450/7325367
vhd vga.vhd
-------------------------------------------------------------------------------
-- vga.vhd
--
-- Author(s): Ashley Partis and Jorgen Peddersen
-- Created: Jan 2001
-- Last Modified: Jan
www.eeworm.com/read/457446/7325462
vhd vga.vhd
-------------------------------------------------------------------------------
-- vga.vhd
--
-- Author(s): Ashley Partis and Jorgen Peddersen
-- Created: Jan 2001
-- Last Modified: Jan
www.eeworm.com/read/447170/7556900
vhd vga.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primi
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sof vga.sof
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vhd vga.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY VGA IS
PORT (CLK,MD:IN STD_LOGIC;
HS,VS,R,G,B,FCLK1,CCLK1:OUT STD_LOGIC;
FS1:OUT STD_LOGIC_VECTOR(3
www.eeworm.com/read/445193/7598093
qws vga.qws
[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames