代码搜索：Interface
找到约 10,000 项符合「Interface」的源代码
代码结果 10,000
www.eeworm.com/read/376325/9320551
vhd cpu_interface_rtl.vhd
-- hds header_start
--
-- VHDL Architecture UART_TXT.cpu_interface.symbol
--
-- Created:
-- by - user.group (host.domain)
-- at - 19:05:45 28 Aug 2001
--
-- Generated by Ment
www.eeworm.com/read/180014/9323600
png cf_ide_interface.png
www.eeworm.com/read/179388/9359425
asm 3100_2interface.asm
;==================================================================================================
;
; Include Definitions
;
;=========================================================
www.eeworm.com/read/179388/9359427
obj 3100_2interface.obj
www.eeworm.com/read/375322/9364094
vhd ddr_control_interface.vhd
--
--
-- LOGIC CORE: DDR Control Interface - Top level module
-- MODULE NAME: ddr_control_interface()
-- COMPANY: Northwest Logic, Inc.
--
www.eeworm.com/read/375322/9364102
vhd ddr_control_interface.vhd
--
--
-- LOGIC CORE: DDR Control Interface - Top level module
-- MODULE NAME: ddr_control_interface()
-- COMPANY: Northwest Logic, Inc.
--
www.eeworm.com/read/375321/9364282
bak user_interface.v.bak
/*
这个模块是用户用于测试sdram controller的,主要思路如下:(读取rom数据，写入sdram,然后在读取sdram数据写入ram)
①先等待setup_done信号的到来,此外还加了个计数器time_cnt,用于延时10s,主要目的为了有足够时间让signalTAP抓取信号
②对sdram进行写,先产生写请求信号，并同时提供sdram地址和burst_len的长达
③接着
www.eeworm.com/read/177968/9425473
idl atm_dce_interface.idl
/********************************************************
* An example source module to accompany...
*
* "Using POSIX Threads: Programming with Pthreads"
* by Brad nichols, Dick Buttlar, Jacki