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Input 的代码
input.tal
Design Name = input.tt4
~~~~~~~~~~~~~~~~~~~~~~~
*******************
* TIMING ANALYSIS *
*******************
Timing Analysis KEY:
One unit of delay time is equivalent to one pass
input.bl2
#$ TOOL ispLEVER 2.01.28.41.02
#$ DATE Wed May 28 08:10:39 2003
#$ MODULE input
#$ PINS 32 p2_2_ p2_1_ adresse_5_ p2_0_ p7_2_ data_7_ p7_1_ p7_0_ p2_7_ p8_6_ p7_3_ p8_7_ \
# reset rd wr cs adress
input.jid
. Input_PLD inputpld.vhd w:\projekte\tqmx16xu\rev100a\sw\pld\input\inputpld.vhd
input.nrp
ispLEVER 2.01.28.41.02 SDFGEN
Copyright(C),1992-2002, Lattice Semiconductor Corporation. All Rights Reserved.
Output Files:
Netlist File: input.vho
Delay File: input.sdf
Parsing C:\progra
input.tt3
#$ TOOL ispLEVER 2.01.28.41.02
#$ DATE Wed May 28 08:10:39 2003
#$ MODULE input
#$ PINS 32 p2_2_ p2_1_ adresse_5_ p2_0_ p7_2_ p7_1_ p7_0_ p2_7_ p8_6_ p7_3_ p8_7_ reset rd wr cs adresse_4_ adresse_3
input.tt2
#$ TOOL ispLEVER 2.01.28.41.02
#$ DATE Wed May 28 08:10:39 2003
#$ MODULE input
#$ PINS 32 p2_2_ p2_1_ adresse_5_ p2_0_ p7_2_ p7_1_ p7_0_ p2_7_ p8_6_ p7_3_ p8_7_ reset rd wr cs adresse_4_ adresse_3
input.tlg
// Batch Timer Log File (Release Version: 2.01.28.41.02)
// Project = input
// Family = mach4a
// Device = mach468a
// Speed = -5.5
// Voltage = 5.0
// Operating Condition = COM
/
input.data
MODELDATA
MODELDATA_VERSION "1.0";
DESIGN "input";
DATE "Wed May 28 08:21:07 2003";
VENDOR "Lattice Semiconductor Corporation";
PROGRAM "STAMP Model Generator";
/* port drive, max transition a
input.pm
# Samba Build System
# - the input checking functions
#
# Copyright (C) Stefan (metze) Metzmacher 2004
# Copyright (C) Jelmer Vernooij 2004
# Released under the GNU GPL
use strict;
package smb_bui
input
vim:syntax=html