代码搜索：Inference
找到约 1,820 项符合「Inference」的源代码
代码结果 1,820
www.eeworm.com/read/389692/8507228
m discfis.m
function [XI,YI,XO,YO,R] = discfis(fis,numPts)
%DISCFIS Discretize a fuzzy inference system.
% [XI,YI,XO,YO,R] = DISCFIS(fis,numPts) discretizes all the membership
% functions for the input and
www.eeworm.com/read/361765/10036970
cc mcmcdynamicei.cc
// fits a model derived from Wakefield's baseline model for
// ecological inference in which logit(p_i) follows a random walk in time
// a priori. The model is fit using Wakefield's normal approximat
www.eeworm.com/read/164962/10080370
vhd latchinf.vhd
-- MAX+plus II VHDL Example
-- Latch Inference
-- Copyright (c) 1994 Altera Corporation
Library IEEE ;
use IEEE.std_logic_1164.all ;
ENTITY latchinf IS
PORT
(
enable, data : IN BIT;
www.eeworm.com/read/359005/10171593
m discfis.m
function [XI,YI,XO,YO,R] = discfis(fis,numPts)
%DISCFIS Discretize a fuzzy inference system.
% [XI,YI,XO,YO,R] = DISCFIS(fis,numPts) discretizes all the membership
% functions for the input and
www.eeworm.com/read/141282/13024754
txt 简单的锁存器.txt
-- MAX+plus II VHDL Example
-- Latch Inference
-- Copyright (c) 1994 Altera Corporation
Library IEEE ;
use IEEE.std_logic_1164.all ;
ENTITY latchinf IS
PORT
(
enable, data : IN BIT;
www.eeworm.com/read/140847/5779090
m discrete2.m
% Compare various inference engines on the following network (from Jensen (1996) p84 fig 4.17)
% 1
% / | \
% 2 3 4
% | | |
% 5 6 7
% \/ \/
% 8 9
% where all arcs point downwards
www.eeworm.com/read/140847/5779130
m discrete3.m
% Compare various inference engines on the following network (from Jensen (1996) p84 fig 4.17)
% 1
% / | \
% 2 3 4
% | | |
% 5 6 7
% \/ \/
% 8 9
% where all arcs point downwards
www.eeworm.com/read/133943/5897276
m discrete2.m
% Compare various inference engines on the following network (from Jensen (1996) p84 fig 4.17)
% 1
% / | \
% 2 3 4
% | | |
% 5 6 7
% \/ \/
% 8 9
% where all arcs point downwards
www.eeworm.com/read/133943/5897315
m discrete3.m
% Compare various inference engines on the following network (from Jensen (1996) p84 fig 4.17)
% 1
% / | \
% 2 3 4
% | | |
% 5 6 7
% \/ \/
% 8 9
% where all arcs point downwards
www.eeworm.com/read/263314/11367796
vhd latchinf.vhd
-- MAX+plus II VHDL Example
-- Latch Inference
-- Copyright (c) 1994 Altera Corporation
Library IEEE ;
use IEEE.std_logic_1164.all ;
ENTITY latchinf IS
PORT
(
enable, data : IN BIT;