代码搜索:Inference

找到约 1,820 项符合「Inference」的源代码

代码结果 1,820
www.eeworm.com/read/140847/5779632

m jtree_dbn_inf_engine.m

function engine = jtree_dbn_inf_engine(bnet, varargin) % JTREE_DBN_INF_ENGINE Junction tree inference algorithm for DBNs. % engine = jtree_inf_engine(bnet, ...) % % The following optional arguments ca
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m chmm1.m

% Compare the speeds of various inference engines on a coupled HMM N = 2; Q = 2; rand('state', 0); randn('state', 0); discrete = 1; if discrete Y = 2; % size of output alphabet else Y = 1; end co
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m water2.m

% Compare the speeds of various inference engines on the water DBN seed = 0; rand('state', seed); randn('state', seed); bnet = mk_water_dbn; T = 3; engine = {}; engine{end+1} = smoother_e
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m cond_gauss_inf_engine.m

function engine = cond_gauss_inf_engine(bnet) % COND_GAUSS_INF_ENGINE Conditional Gaussian inference engine % engine = cond_gauss_inf_engine(bnet) % % Enumerates all the discrete roots, and runs jtree
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m belprop_fg_inf_engine.m

function engine = belprop_fg_inf_engine(fg, varargin) % BELPROP_FG_INF_ENGINE Make a belief propagation inference engine for factor graphs % engine = belprop_fg_inf_engine(factor_graph, ...) % % The
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m hmm_inf_engine.m

function engine = hmm_inf_engine(bnet, varargin) % HMM_INF_ENGINE Inference engine for DBNs which uses the forwards-backwards algorithm. % engine = hmm_inf_engine(bnet, ...) % % The following optional
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m jtree_dbn_inf_engine.m

function engine = jtree_dbn_inf_engine(bnet, varargin) % JTREE_DBN_INF_ENGINE Junction tree inference algorithm for DBNs. % engine = jtree_inf_engine(bnet, ...) % % The following optional arguments ca
www.eeworm.com/read/382666/6286496

vhd 简单的锁存器.vhd

-- Latch Inference -- Download from: http://www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all ; ENTITY latchinf IS PORT ( enable, data : IN BIT; q : OUT BIT ); END l
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vhd 简单的锁存器.vhd

-- Latch Inference -- Download from: http://www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all ; ENTITY latchinf IS PORT ( enable, data : IN BIT; q : OUT BIT ); END l
www.eeworm.com/read/487908/6501825

vhd 简单的锁存器.vhd

-- Latch Inference -- Download from: http://www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all ; ENTITY latchinf IS PORT ( enable, data : IN BIT; q : OUT BIT ); END l