代码搜索:Hspice
找到约 140 项符合「Hspice」的源代码
代码结果 140
www.eeworm.com/read/375854/9347489
sp p3-35.sp
*HSPICE SIMULATION FILE EX3-12
.OPTIONS POST=2 LIST
*COMMON-SOURCE USING ACTIVE LOAD
.lib '.\Mm0355V.l' tt
M1 1 1 VDD VDD PCH W=8U L=2U
M2 OUT 1 VDD VDD PCH W=8U L=2U
M3 OUT VIN GND GND NCH W=
www.eeworm.com/read/375854/9347500
sp p3-30.sp
*HSPICE SIMULATION FILE EX3-10
.OPTIONS POST=2 LIS
*common GATE ampilifier
.lib '.\Mm0355V.l' tt
M1 1 2 3 GND NCH W=60U L=2U
RG 2 GND 100K
RD VDD 1 4K
RS 4 VI 100
RL VO 2 4K
Cc1 3 4 100U
C
www.eeworm.com/read/261982/11612323
sp nmos.sp
A NMOS
.OPTIONS LIST NODE POST
.DC VIN 0V 2V 0.1V
.DC VDS 0V 3V 0.1V
.PRINT DC I(M1)
VDS 1 0 3V
VIN 2 0 2V
M1 1 2 0 0 NMOS L=10U W=10U
.lib "E:\study\hspice_analog\h06mixddct02v24.lib" tt
.E
www.eeworm.com/read/261982/11612325
sp pmos.sp
B PMOS
.OPTIONS LIST NODE POST
.DC VIN 0V 2V 0.1V
.DC VDS 0V 3V 0.1V
.PRINT DC I(M1)
VDS 1 0 3V
VIN 2 0 2V
M1 1 2 0 1 PMOS L=.5U W=.5U
.lib "E:\study\hspice_analog\h06mixddct02v24.lib" tt
.E
www.eeworm.com/read/198984/7897805
ic0 cxm_o.ic0
* "simulator" "HSPICE"
* "version" "U-2003.03 (20030106)"
* "format" "HSP"
* "rundate" "11:37:17 07/08/2006"
* "netlist" "e:\resourse\myprojects\ic_design\hspice_mixer\work\新建文件夹\cxm_o.sp "
*
www.eeworm.com/read/446396/7580477
st0 8x8multiplier.st0
***** HSPICE -Z-2007.03 32-BIT (Feb 28 2007) 10:14:58 03/08/2009 pcnt
Input File: d:\3108030037_asic\mydesign\8x8multiplier.sp
lic:
lic: FLEXlm: v8.4b
lic: USER: Administrator HOSTNA
www.eeworm.com/read/141300/5770151
sp vbic.sp
VBIC Test
VC 1 0 DC 2.0
VB 2 0 DC 0.7
VE 3 0 DC 0.0
*VS 4 0 DC 0.0
Q1 1 2 3 VBIC_HSPICE
.OPTIONS GMIN=1e-13
*.OP
.DC VB 0.2 1.0 0.01
.control
run
plot abs(-i(vc)) abs(-i(vb)) ylimit 1e-12 0.1
www.eeworm.com/read/141300/5770286
cir vbic.cir
VBIC Test
VC 1 0 DC 2.0
VB 2 0 DC 0.7
VE 3 0 DC 0.0
*VS 4 0 DC 0.0
Q1 1 2 3 VBIC_HSPICE
.OPTIONS GMIN=1e-13
.OP
.DC VB 0.2 1.0 0.01
.print dc -i(vc) -i(vb)
.MODEL VBIC NPN LEVEL=4
+ RCX=10 R
www.eeworm.com/read/390421/8465943
mt0 wiredelay.mt0
$DATA1 SOURCE='HSPICE' VERSION='W-2005.03 '
.TITLE 'wire delay model'
delay1 delay2 temper alter#
1.155e-10 1.137e-10 25.0000
www.eeworm.com/read/261983/11612291
sp inverter_nmos.sp
inverter_nmos.sp
.global vdd
vdc vdd gnd 2.5v
.protect
.lib 'E:\study\hspice_digtal\l18u18v.122.lib' L18U18V_TT
.unprotect
m1 out in gnd gnd NMOS w=0.36u l=0.18u
m2 vdd vx out gnd NMOS w=0.3