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/************************************************************************************************************ TEST BENCH FOR I2C to GPIO Port expander. Date: December 23, 2006. *********************

[Library] ; Altera specific primitive library mappings vital2000 = $MODEL_TECH/../vital2000 ieee = $MODEL_TECH/../ieee verilog = $MODEL_TECH/../verilog std = $MODEL_TECH/../std std_develope

/************************************************************************************************************ TEST BENCH FOR I2C to GPIO Port expander. Date: December 23, 2006. *********************

Extra Info: Performing register packing on registers with non-logic cell location assignments Extra Info: Completed register packing on registers with non-logic cell location assignments Extra Info:

Analysis & Synthesis Status : Successful - Thu Nov 22 16:52:31 2007 Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version Revision Name : I2C_to_GPIO Top-level Entity Name : I2C_to_GPIO Fa

Fitter Status : Successful - Thu Nov 22 16:52:35 2007 Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version Revision Name : I2C_to_GPIO Top-level Entity Name : I2C_to_GPIO Family : MAX II

Analysis & Synthesis report for I2C_to_GPIO Thu Nov 22 16:52:31 2007 Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version --------------------- ; Table of Contents ; ------------------

Flow report for I2C_to_GPIO Thu Nov 22 16:52:42 2007 Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal

-------------------------------------------------------------------------------------- Timing Analyzer Summary --------------------------------------------------------------------------------------

Assembler report for I2C_to_GPIO Thu Nov 22 16:52:39 2007 Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. L