代码搜索：Fall
找到约 1,303 项符合「Fall」的源代码
代码结果 1,303
www.eeworm.com/read/493316/6400816
txt mem_interface_top_user_interface_0.txt
///////////////////////////////////////////////////////////////////////////////
// Copyright (c) 2005 Xilinx, Inc.
// This design is confidential and proprietary of Xilinx, All Rights Reserved.
///
www.eeworm.com/read/476487/6762697
txt mem_interface_top_user_interface_0.txt
///////////////////////////////////////////////////////////////////////////////
// Copyright (c) 2005 Xilinx, Inc.
// This design is confidential and proprietary of Xilinx, All Rights Reserved.
///
www.eeworm.com/read/403928/11498790
txt mem_interface_top_user_interface_0.txt
///////////////////////////////////////////////////////////////////////////////
// Copyright (c) 2005 Xilinx, Inc.
// This design is confidential and proprietary of Xilinx, All Rights Reserved.
///
www.eeworm.com/read/163610/10152470
data hpi_epp.data
MODELDATA
MODELDATA_VERSION "v1998.8"
DESIGN "hpi_epp";
/* port drive, load, max capacitance and max transition in data file */
PORTDATA
nwrite: MAXTRANS(0.0);
nastrb: MAXTRANS(0.0);
ndstrb:
www.eeworm.com/read/437034/7756463
deck mixed_io_size.deck
Mixed IO sizes
*
* This circuit contains a collection of digital and analog
* models with saclar and vector inputs of varying sizes.
*
.tran 1e-5 1e-3
*
v1 1 0 0.0 pulse(0 1 1e-4)
r1 1 0 1k
*
www.eeworm.com/read/437034/7756485
deck digital_models.deck
Digital models
*
* This circuit contains a nand gate oscillator enabled by
* a pulse input after 20nS. Node 1 is an analog node.
* Nodes 2 and 3 are digital nodes.
*
.tran 1e-8 1e-7
*
v1 1 0
www.eeworm.com/read/198078/7951904
c counter3.c
////////////////////////////
//private counter
//cjy 2006 11.28 at GDUT
///////////////////////////
#include "reg52.h"
#include "math.h"
#include "24c02.h"
////////端口定义///////////
#define com_
www.eeworm.com/read/141300/5772634
deck mixed_io_size.deck
Mixed IO sizes
*
* This circuit contains a collection of digital and analog
* models with saclar and vector inputs of varying sizes.
*
.tran 1e-5 1e-3
*
v1 1 0 0.0 pulse(0 1 1e-4)
r1 1 0 1k
*
www.eeworm.com/read/141300/5772656
deck digital_models.deck
Digital models
*
* This circuit contains a nand gate oscillator enabled by
* a pulse input after 20nS. Node 1 is an analog node.
* Nodes 2 and 3 are digital nodes.
*
.tran 1e-8 1e-7
*
v1 1 0 0.0 puls
www.eeworm.com/read/480891/6663398
c adxl210.c
////////////////////////////////////////////////////////////////////////////
//// ////
//// adxl210.c