代码搜索：FPGA EDK

找到约 10,000 项符合「FPGA EDK」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/349984/10778980

c disfpga.c

#include "mcf5307.h" #include "cpld.h" #include "DSTNver2.h" #define FPGA_SIZE_SERIAL 0x577B //;179160 bits = 22395 Bytes(0x577B) #define DIS_CLEAR_MEMORY (IO_BASE_ADDR + OUT_DIS_FPGA_P
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www.eeworm.com/read/467448/7012818

srd dds.srd

f "noname"; #file 0 f "c:\program files\synplicity\fpga_901\lib\vhd\std.vhd"; #file 1 f "g:\eda\qdds\adder.vhd"; #file 2 f "c:\program files\synplicity\fpga_901\lib\vhd\std1164.vhd"; #file 3 f "c:
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www.eeworm.com/read/202633/7125020

bld can_top.bld

Release 6.1i - ngdbuild G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -intstyle ise -dd e:\program\fpga_program\for_fpga\can\ise\canbus/_ngo -i -p xc2s300e-p
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www.eeworm.com/read/443860/7621529

bld can_top.bld

Release 6.1i - ngdbuild G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -intstyle ise -dd e:\program\fpga_program\for_fpga\can\ise\canbus/_ngo -i -p xc2s300e-p
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www.eeworm.com/read/142670/12931205

srd counter10.srd

f "noname"; #file 0 f "d:\program files\synplicity\fpga_81\lib\vhd\std.vhd"; #file 1 f "d:\vhdl_exercise\counter10\counter10.vhd"; #file 2 f "d:\program files\synplicity\fpga_81\lib\vhd\std1164.vhd
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www.eeworm.com/read/8785/153172

bld can_top.bld

Release 6.1i - ngdbuild G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -intstyle ise -dd e:\program\fpga_program\for_fpga\can\ise\canbus/_ngo -i -p xc2s300e-p
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www.eeworm.com/read/17670/752776

regkeys

CommandLine E:/FPGA/Xilinx/10.1/ISE/bin/nt/unwrapped/trce.exe -ise E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/xapp860.ise -intstyle ise -v 3 -s 1 -xml lvds_bist_top lvds_bist_top.ncd -o
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www.eeworm.com/read/17670/753388

regkeys

CommandLine E:\FPGA\Xilinx\10.1\ISE\bin\nt\unwrapped\ngcbuild.exe -dd E:/linpingping/ATCA_converge_board/LVDS_Serdes_list_FPGA1/_ngo -p xc5vfx130t-ff1738-1 -i E:\linpingping\ATCA_converge_board\LVDS_S
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www.eeworm.com/read/17694/754234

regkeys

CommandLine E:/FPGA/Xilinx/10.1/ISE/bin/nt/unwrapped/trce.exe -ise E:/linpingping/ATCA_converge_board/DAC/LVDS_DDR_List_FPGA2/DDR_TX_TEST.ise -intstyle ise -v 3 -s 1 -xml DDR_TX_TEST DDR_TX_TEST.ncd -
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www.eeworm.com/read/17694/754236

regkeys

CommandLine E:\FPGA\Xilinx\10.1\ISE\bin\nt\unwrapped\bitgen.exe -ise E:/linpingping/ATCA_converge_board/DAC/LVDS_DDR_List_FPGA2/DDR_TX_TEST.ise -intstyle ise -f DDR_TX_TEST.ut DDR_TX_TEST.ncd s Format
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