代码搜索：FPGA EDK

找到约 10,000 项符合「FPGA EDK」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
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_info

m255 13 cModel Technology dF:\EdaOk\project\PeriphDIY\uart\fpga\V0p00\testbench
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www.eeworm.com/read/489559/1216841

adnpesc1 readme.adnpesc1

SSV ADNP/ESC1 Embedded Softcore Computing Nios Softcore, Altera Cyclone FPGA Last Update: February 27, 2004 ==================================================================== This
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www.eeworm.com/read/176125/5340031

adnpesc1 readme.adnpesc1

SSV ADNP/ESC1 Embedded Softcore Computing Nios Softcore, Altera Cyclone FPGA Last Update: February 27, 2004 ==================================================================== This
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www.eeworm.com/read/414420/2146394

adnpesc1 readme.adnpesc1

SSV ADNP/ESC1 Embedded Softcore Computing Nios Softcore, Altera Cyclone FPGA Last Update: February 27, 2004 ==================================================================== This
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www.eeworm.com/read/408818/2242456

adnpesc1 readme.adnpesc1

SSV ADNP/ESC1 Embedded Softcore Computing Nios Softcore, Altera Cyclone FPGA Last Update: February 27, 2004 ==================================================================== This
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www.eeworm.com/read/411988/11218271

svn-base readme.adnpesc1.svn-base

SSV ADNP/ESC1 Embedded Softcore Computing Nios Softcore, Altera Cyclone FPGA Last Update: February 27, 2004 ==================================================================== This
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www.eeworm.com/read/411988/11218463

adnpesc1 readme.adnpesc1

SSV ADNP/ESC1 Embedded Softcore Computing Nios Softcore, Altera Cyclone FPGA Last Update: February 27, 2004 ==================================================================== This
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www.eeworm.com/read/191785/8423134

c disfpga.c

#include "mcf5307.h" #include "cpld.h" #include "DSTNver2.h" #define FPGA_SIZE_SERIAL 0x577B //;179160 bits = 22395 Bytes(0x577B) #define DIS_CLEAR_MEMORY (IO_BASE_ADDR + OUT_DIS_FPGA_P
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www.eeworm.com/read/387422/8684791

bld can_top.bld

Release 6.1i - ngdbuild G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -intstyle ise -dd e:\program\fpga_program\for_fpga\can\ise\canbus/_ngo -i -p xc2s300e-p
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www.eeworm.com/read/166051/10039555

c disfpga.c

#include "mcf5307.h" #include "cpld.h" #include "DSTNver2.h" #define FPGA_SIZE_SERIAL 0x577B //;179160 bits = 22395 Bytes(0x577B) #define DIS_CLEAR_MEMORY (IO_BASE_ADDR + OUT_DIS_FPGA_P
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