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FPGA 的代码
top_fpga.ucf
NET "dout_lcd" LOC = "p125";
NET "dout_lcd" LOC = "p126";
NET "dout_lcd" LOC = "p127";
NET "dout_lcd" LOC = "p129";
NET "dout_lcd" LOC = "p132";
NET "dout_lcd" LOC = "p133";
NE
demo_fpga.gfl
# Editing Cores
# Coregen : Regenerate Core
coregen.log
# XST (Creating Lso File) :
mem_inform.lso
# xst flow : RunXST
mem_inform_summary.html
# xst flow : RunXST
mem_inform.syr
mem_inform.p
fpga_7279.vhd
--FPGA控制7279的程序
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_ARITH.all;
use IEEE.std_logic_UNSIGNED.all;
entity FPGA_7279 is
port (
--以下是引脚信号
CLK :IN S
fpga_7279.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
fpga.uv2
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (Target 1), 0x0000 // Tools: 'MCS-51'
Group (New Group)
File 1,1,
File 1,5,
fpga_misc.v
//FPGA片内寄存器、I2C、UART及其它
module fpga_misc (
//pci
clock,reset_n,
addr_in,data_in,data_out,cs_n,
ready_n,l_cmdo,lt_framen,lt_ackn,lt_dxfrn,lt_tsr,
//rst
reset_reg,dog_clear,
dog_value,