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FPGA 的代码
vhdl.fc2
#----------------------------------------------------------
# Synopsys FPGA Compiler II VHDL simulation script vhdl.fc2
# for the book: DSP with FPGAs (2. edition)
# Author-EMAIL: Uwe.Meyer-Baese@
陀螺仪传感器融合_code例程.c
/*
* Self-balancing Ctrl
*
* By DDAI
* 2010.03.21
*/
#include "system.h" //FPGA NIOS II 软核头文件
#include "sys/alt_irq.h"
#incl
compare.edf
(edif COMPARE
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2002 7 25 13 4 43)
(program "FPGA Express"
(version
ex4_2.edf
(edif COMPARE
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2002 7 25 13 4 43)
(program "FPGA Express"
(version
vhdl.fc2
#----------------------------------------------------------
# Synopsys FPGA Compiler II VHDL simulation script vhdl.fc2
# for the book: DSP with FPGAs (2. edition)
# Author-EMAIL: Uwe.Meyer-Baese@
verilog.fc2
#----------------------------------------------------------
# Synopsys FPGA Compiler II simulation script verilog.fc2
# for the book: DSP with FPGAs (2. edition)
# Author-EMAIL: Uwe.Meyer-Baese@ie
comp42_n64.v
`timescale 1ns/10ps
/*-----------------------------------------------------------------------------
$RCSfile: &
$Source: /home/lefurgy/tmp/ISC-repository/isc/hardware/ARM10/behavioral/pipelined/fpga2/
sram_ctrl_readme.txt
The following files were generated for 'sram_ctrl' in directory
E:\modulator\modulator_fpga\modulator:
sram_ctrl.mif:
Memory Initialization File which is automatically generated by the
CO
nandtest.c
/***************************************************************
Copyright(c) 2002 VIA Technologies, Inc. All Rights Reserved.
Filename: Main.C
Description:
platform : fpga_top.5-2-19-18.bit
i8051_all.vhd
-- Modification by Koay Kah Hoe
-- Optimize for Xilinx Spartan II FPGA implementation
-- Version : 2.9a
--
--
-- Copyright (c) 1999-2001 Tony Givargis. Permission to copy is granted
-- provided that