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readme.txt
SPARTAN-3 FPGA PINOUT INFORMATION
============================================================
Release Date: 10-Jun-2008, v1.6
This archive contains two directories.
* The /tables director
vhdl.fc2
#----------------------------------------------------------
# Synopsys FPGA Compiler II VHDL simulation script vhdl.fc2
# for the book: Digital Signal Processing with FPGAs
# Author-EMAIL: Uwe.Mey
vhdl.fc2
#----------------------------------------------------------
# Synopsys FPGA Compiler II VHDL simulation script vhdl.fc2
# for the book: Digital Signal Processing with FPGAs
# Author-EMAIL: Uwe.Mey
config.help
Prompt for target technology
CONFIG_SYN_INFERRED
Selects the target technology for memory and pads.
The following are available:
- Inferred: Generic FPGA or ASIC targets if your synthesis to
config.help
Prompt for target technology
CONFIG_SYN_INFERRED
Selects the target technology for memory and pads.
The following are available:
- Inferred: Generic FPGA or ASIC targets if your synthesis to
config.help
Prompt for target technology
CONFIG_SYN_INFERRED
Selects the target technology for memory and pads.
The following are available:
- Inferred: Generic FPGA or ASIC targets if your synthesis to
config.help
Prompt for target technology
CONFIG_SYN_INFERRED
Selects the target technology for memory and pads.
The following are available:
- Inferred: Generic FPGA or ASIC targets if your synthesis to