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# Xilinx CORE Generator 6.1i # User = 刘韬 Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\program\FPGA_PROGRAM\FOR_FPGA\CAN\ise\canbus\coregen.log N

其实我下面所要说的用两个字就可以概括：参考。 1。首先，xilinx所发布的文档是你首要参考的。xilinx针对每个系列的<mark>FPGA</mark>都提供了丰富而全面的文档，所以在你开始任何一个系列的<mark>FPGA</mark>设计前，到xilinx网站上，进入那个系列<mark>FPGA</mark>的页面上将所有的文档都下载下来，然后有针对性的做参考。（做好了这一步，你的<mark>FPGA</mark>设计不会出什么大的纰漏） 2。参考勘误文档。xilinx会发布一些勘误 ...

F:\dp_fpga\dp-fpga\xc2s100\key\keyled.ngc 1045470176 OK

# Xilinx CORE Generator 6.1i # User = 刘韬 Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\program\FPGA_PROGRAM\FOR_FPGA\CAN\ise\canbus\coregen.log N

# Xilinx CORE Generator 6.1i # User = 刘韬 Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\program\FPGA_PROGRAM\FOR_FPGA\CAN\ise\canbus\coregen.log N

1. 将文件拷贝到linux-2.6.17/drivers/char之下 2 在文件linux-2.6.17/drivers/char/Kconfig中添加 config AT9200_FPGA tristate "FPGA support of AT91RM9200" depends on ARCH_AT91RM9200 default n help the support of F

1. 将文件拷贝到linux-2.6.17/drivers/char之下 2 在文件linux-2.6.17/drivers/char/Kconfig中添加 config AT9200_FPGA tristate "FPGA support of AT91RM9200" depends on ARCH_AT91RM9200 default n help the support of F

# Xilinx CORE Generator 6.1i # User = 刘韬 Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\program\FPGA_PROGRAM\FOR_FPGA\CAN\ise\canbus\coregen.log N

. pwm pwm.v f:\dp-fpga\实验例程\pwm\pwm.v

. clock clock.v f:\dp-fpga\实验例程\clock\clock.v