代码搜索：FPGA驱动
找到约 10,000 项符合「FPGA驱动」的源代码
代码结果 10,000
www.eeworm.com/read/268840/6940580
ps fpga.ps
%!PS-Adobe-3.0
%%Creator: gEDA gschem 20060906
%%CreationDate: Thu Oct 19 19:02:11 2006
%%Title: /home/matt/usrp-hw/usrp/fpga.sch
%%Author: matt
%%BoundingBox: 0 0 792 1224
%%Pages: 1
%%Endcomments
%%
www.eeworm.com/read/298641/7117684
bmp fpga.bmp
www.eeworm.com/read/392372/7124319
pdf fpga.pdf
www.eeworm.com/read/460614/7245519
opt fpga.opt
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm {
www.eeworm.com/read/460614/7245638
plg fpga.plg
礦ision3 Build Log
Project:
D:\xinhaoyuan\fpga.uv2
Project File Date: 11/12/2008
Output:
www.eeworm.com/read/458228/7301611
ppt fpga.ppt
www.eeworm.com/read/454645/7386183
pdf fpga.pdf
www.eeworm.com/read/453278/7422980
pdf fpga.pdf
www.eeworm.com/read/447146/7557694
vhd fpga.vhd
--library ieee;
--use ieee.std_logic_1164.all;
entity fpga is
port (A,B,C,D: in bit;
PBGNT, MACK, CONT : in bit;
RST, CLK : in bit;
PBREQ, CMREQ, CE, CNTLD, CLD : out bit);
end fpga;
architect
www.eeworm.com/read/446517/7577277
bde fpga.bde
SCHM0102
HEADER
{
FREEID 2767
VARIABLES
{
#ARCHITECTURE="Fpga"
#BLOCKTABLE_FILE="#table.bde"
#BLOCKTABLE_INCLUDED="1"
#ENTITY="FPGA"
#LANGUAGE="VHDL"
AUTHOR="Slawek Grabows