代码搜索：FPGA加速
找到约 10,000 项符合「FPGA加速」的源代码
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www.eeworm.com/read/460614/7245642
uv2 fpga.uv2
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (Target 1), 0x0000 // Tools: 'MCS-51'
Group (New Group)
File 1,1,
File 1,5,
www.eeworm.com/read/457944/7315160
v fpga_misc.v
//FPGA片内寄存器、I2C、UART及其它
module fpga_misc (
//pci
clock,reset_n,
addr_in,data_in,data_out,cs_n,
ready_n,l_cmdo,lt_framen,lt_ackn,lt_dxfrn,lt_tsr,
//rst
reset_reg,dog_clear,
dog_value,
www.eeworm.com/read/453888/7405821
pdf fpga & cpld.pdf
www.eeworm.com/read/451651/7458731
caj fpga_pcm.caj
www.eeworm.com/read/450760/7476967
v fpga_port.v
module FPGA_BUS_PORT(clk,cs,wr,rd,data,add,reg1_out,reg2_out,
clk_out,cs1,wave_out1,DA_clk_out,DA_sleep_out);
input clk,cs,wr,rd;
inout[15:0] data;
input[7:0] add;
output[15:0] reg1_out,reg2
www.eeworm.com/read/449867/7495289
doc fpga-design.doc
www.eeworm.com/read/445280/7596917
doc fpga.fifo.doc
www.eeworm.com/read/443710/7625736
sof fpga_am.sof
www.eeworm.com/read/443710/7625750
cdf fpga_am.cdf
/* Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(EP1C3T144) Path("J:/FPGA/my_exercises