代码搜索：FPGA加速
找到约 10,000 项符合「FPGA加速」的源代码
代码结果 10,000
www.eeworm.com/read/306178/3754145
c sroad5.c
// sroad5.c
// Modified by Java Apr.27 1998
inherit ROOM;
void create()
{
set("short","大雪山");
set("long",@LONG
这儿遍地冰雪，你眼前白皑皑的一片。从东边爬上来的，心跳开始加速。
LONG );
set("exits",(
www.eeworm.com/read/169233/9873561
scc mssccprj.scc
[SCC]
SCC=This is a source code control file
[FPGA串行通讯.vbp]
SCC_Project_Name=this project is not under source code control
SCC_Aux_Path=
www.eeworm.com/read/167697/9955515
vhd 条件赋值：使用多路选择器.vhd
-- Conditional Signal Assignment with Multiple Alternatives
-- download from: www.pld.com.cn & www.fpga.com.cn
Library IEEE ;
use IEEE.std_logic_1164.all ;
ENTITY condsigm IS
PORT
(
www.eeworm.com/read/358376/10190198
xco ram_descramb.xco
# BEGIN Project Options
SET flowvendor = Foundation_iSE
SET vhdlsim = True
SET verilogsim = True
SET workingdirectory = "D:\DLP\FPGA Projects\CellSearch03"
SET speedgrade = -12
SET simulationfiles = B
www.eeworm.com/read/354473/10351025
v led.v
// Light 8 LED
// Designed By Smokingfish @ www.51FPGA.com zhiyuh@163.com
module LED (LED);
output [13:0] LED;
assign LED=14'b11100110111001;//"CP"
endmodule
www.eeworm.com/read/417397/10991783
txt 条件赋值：使用多路选择器.txt
-- Conditional Signal Assignment with Multiple Alternatives
-- download from: www.pld.com.cn & www.fpga.com.cn
Library IEEE ;
use IEEE.std_logic_1164.all ;
ENTITY condsigm IS
PORT
(