代码搜索：FPGA加速

找到约 10,000 项符合「FPGA加速」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/337546/3338498

c usx2yhwdep.c

/* * Driver for Tascam US-X2Y USB soundcards * * FPGA Loader + ALSA Startup * * Copyright (c) 2003 by Karsten Wiese * * This program is free software; you can redi
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www.eeworm.com/read/324920/3497243

c usx2yhwdep.c

/* * Driver for Tascam US-X2Y USB soundcards * * FPGA Loader + ALSA Startup * * Copyright (c) 2003 by Karsten Wiese * * This program is free software; you can redi
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www.eeworm.com/read/316872/3603654

c usx2yhwdep.c

/* * Driver for Tascam US-X2Y USB soundcards * * FPGA Loader + ALSA Startup * * Copyright (c) 2003 by Karsten Wiese * * This program is free software; you can redi
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www.eeworm.com/read/294145/3919398

readme

rrc_complex =========== This module is used to interface the ICS-cards in a fast way. The operations done here should be put in the cards FPGA later. For the reception-part, two versions exist: one
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www.eeworm.com/read/291165/3969327

readme

rrc_complex =========== This module is used to interface the ICS-cards in a fast way. The operations done here should be put in the cards FPGA later. For the reception-part, two versions exist: one
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www.eeworm.com/read/414420/2146467

ml300 readme.ml300

Xilinx ML300 platform ===================== 0. Introduction --------------- The Xilinx ML300 board is based on the Virtex-II Pro FPGA with integrated AMCC PowerPC 405 core. The board is normally boo
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www.eeworm.com/read/408818/2242509

ml300 readme.ml300

Xilinx ML300 platform ===================== 0. Introduction --------------- The Xilinx ML300 board is based on the Virtex-II Pro FPGA with integrated AMCC PowerPC 405 core. The board is normally boo
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www.eeworm.com/read/393286/2485048

c usx2yhwdep.c

/* * Driver for Tascam US-X2Y USB soundcards * * FPGA Loader + ALSA Startup * * Copyright (c) 2003 by Karsten Wiese * * This program is free software; you can redi
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www.eeworm.com/read/383868/2611080

c usx2yhwdep.c

/* * Driver for Tascam US-X2Y USB soundcards * * FPGA Loader + ALSA Startup * * Copyright (c) 2003 by Karsten Wiese * * This program is free software; you can redi
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www.eeworm.com/read/172720/9695611

ucf pndkr_1e_build_17.ucf

# This is a location constraints file for use with the PNDKR-1E FPGA board. # The PNDKR-1E was designed by John Clayton # # Author of this file: John Clayton # Update: Jan. 6, 2003 # # NOTE: To
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