代码搜索：FPGA加速
找到约 10,000 项符合「FPGA加速」的源代码
代码结果 10,000
www.eeworm.com/read/293178/3934716
f0d8042940b0001a1a63d3d08997d9bf
/* FH K鰈n, Prof. Dr.-Ing. Jens-Onno Krah
* Diplomarbeitsthema: FPGA-basierte BiSS-Interface Master-Ansteuerung
* Autor: Ren
www.eeworm.com/read/290652/3971663
lst netlist.lst
D:\FPGA实验\实验\实验5_抢答器设计实验程序\抢答器设计实验程序\PREEMPTION\preemption.ngc 1163415180
OK
www.eeworm.com/read/194049/8199831
asm test.asm
; http://gforge.openchip.org/projects/a86
;
; First Program being assembled and executed on a86 (FPGA implementation)
; (earlier it was only either simulation run or machine code programs)
;
; In
www.eeworm.com/read/236100/14031688
c nandtest.c
/***************************************************************
Copyright(c) 2002 VIA Technologies, Inc. All Rights Reserved.
Filename: Main.C
Description:
platform : fpga_top.5-2-19-18.bit
www.eeworm.com/read/110716/15527258
vhd i8051_all.vhd
-- Modification by Koay Kah Hoe
-- Optimize for Xilinx Spartan II FPGA implementation
-- Version : 2.9a
--
--
-- Copyright (c) 1999-2001 Tony Givargis. Permission to copy is granted
-- provided that
www.eeworm.com/read/387422/8684607
_info
m255
cModel Technology
de:\program\fpga_program\for_fpga\can\ise\canbus
vcan_acf
IV^L;BVT]]=4kB?3^f5iD^0
V7KkB[VcOEkYNUAC[hg:703
w1105406889
Fcan_acf.v
Ftimescale.v
Fcan_defines.v
L0 83
OE;L;5.7e;17
r
www.eeworm.com/read/202633/7124933
_info
m255
cModel Technology
de:\program\fpga_program\for_fpga\can\ise\canbus
vcan_acf
IV^L;BVT]]=4kB?3^f5iD^0
V7KkB[VcOEkYNUAC[hg:703
w1105406889
Fcan_acf.v
Ftimescale.v
Fcan_defines.v
L0 83
OE;L;5.7e;17
r
www.eeworm.com/read/443860/7621442
_info
m255
cModel Technology
de:\program\fpga_program\for_fpga\can\ise\canbus
vcan_acf
IV^L;BVT]]=4kB?3^f5iD^0
V7KkB[VcOEkYNUAC[hg:703
w1105406889
Fcan_acf.v
Ftimescale.v
Fcan_defines.v
L0 83
OE;L;5.7e;17
r
www.eeworm.com/read/8785/153085
_info
m255
cModel Technology
de:\program\fpga_program\for_fpga\can\ise\canbus
vcan_acf
IV^L;BVT]]=4kB?3^f5iD^0
V7KkB[VcOEkYNUAC[hg:703
w1105406889
Fcan_acf.v
Ftimescale.v
Fcan_defines.v
L0 83
OE;L;5.7e;17
r
www.eeworm.com/read/17540/737726
cpld
说明：由于FPGA常用模块牵涉到硬件的东西少，书中内容不是按接口分类的，而且FPGA程序有烧写通用性，一个硬件板就可以实现所有功能，读者只要根据实际需要更改引脚和跳线即可。所以光盘里没有提供电路图文件。