代码搜索:FPGA加速
找到约 10,000 项符合「FPGA加速」的源代码
代码结果 10,000
www.eeworm.com/read/236090/7807234
txt fpga+1602.txt
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity LCD1602 is
Port ( CLK : in std_logic; --状态机时钟信号,同时也是液晶时钟信号,其周期应该满足液晶数据的建立时间
Res
www.eeworm.com/read/198123/7950343
pdf fpga_sopc.pdf
www.eeworm.com/read/396675/8095969
doc misunderstanding_in_fpga.doc
www.eeworm.com/read/295815/8138422
c set_fpga.c
#include
#include
#include
#include
#include
#include "seeddm642.h"
void SlaveSerial();
void ShiftDataOut(char Data);
void Check_DONE
www.eeworm.com/read/246965/12695358
c fpga_load.c
/* 用8031加载ALtera的FPGA,也可用于Xilinx的FPGA的加载 */
void load_epld(void)
{
unsigned char data i;
unsigned int data j;
unsigned char xdata * data pt;
SCON = 0x0; /* 设置8031工作在方式0,
www.eeworm.com/read/245030/12826083
caj fpga_dds.caj
www.eeworm.com/read/244135/12884147
c fpga_spi.c
/*
* linux/arch/arm/omap/omap1/fpga_spi.c
*
* Copyright (C) 2006 GE Corporation
* Author: Yang Yong
*
* Download FPGA data to Ateral stratix2 FPGA via SPI
*
*/
/*
* l
www.eeworm.com/read/142563/12939452
c fpga_load.c
/* 用8031加载ALtera的FPGA,也可用于Xilinx的FPGA的加载 */
void load_epld(void)
{
unsigned char data i;
unsigned int data j;
unsigned char xdata * data pt;
SCON = 0x0; /* 设置8031工作在方式0,
www.eeworm.com/read/329618/12944170
pdf cpld,fpga.pdf
www.eeworm.com/read/329381/12957214
cmd fpga_loadercfg.cmd
/* Do *not* directly modify this file. It was */
/* generated by the Configuration Tool; any */
/* changes risk being overwritten. */
/* INPUT fpga_loader.cdb */
/* MODULE