代码搜索：Direction

找到约 10,000 项符合「Direction」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/165387/10065872

java wormlink.java

/* * @(#)WormLink.java 1.4 04/01/27 * * Copyright (c) 2000-2004 Sun Microsystems, Inc. All rights reserved. * PROPRIETARY/CONFIDENTIAL * Use is subject to license terms */ /* * WormLink.java
·
www.eeworm.com/read/164962/10080409

vhd counters_altera.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
·
www.eeworm.com/read/162472/10303147

vhd 各种功能的计数器.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
·
www.eeworm.com/read/353811/10416342

vhd 各种功能的计数器.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation -- download from:www.pld.com.cn & www.fpga.com.cn Library IEEE ; use IEEE.std_logic_1164.all
·
www.eeworm.com/read/422934/10600370

cpp crelay.cpp

#include "SensorBase.h" #include "DigitalModule.h" #include "Relay.h" #include "CRelay.h" static Relay* relays[SensorBase::kDigitalModules][SensorBase::kRelayChannels]; static bool initialized
·
www.eeworm.com/read/422634/10623995

m ckr2_regular.m

function [z, zx1, zx2] = ckr2_regular(y, h, r, ksize) % [CKR2_REGULAR] % The second order classic kernel regression function for regularly sampled % data. % % [USAGE] % [z, zx1, zx2] = ckr2_regu
·
www.eeworm.com/read/422532/10631523

vhd counters.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation ENTITY counters IS PORT ( d : IN INTEGER RANGE 0 TO 255; clk : IN BIT; clear
·
www.eeworm.com/read/277081/10670319

txt 各种功能计数器.txt

各种功能的计数器 vhdl Library IEEE ; use IEEE.std_logic_1164.all ; use IEEE.std_logic_arith.all ; ENTITY counters IS PORT ( d : IN INTEGER RANGE 0 TO 255; clk : IN BIT; clear : IN BIT; ld :
·
www.eeworm.com/read/159105/10694411

vhd counters.vhd

-- MAX+plus II VHDL Example -- Efficient Counter Inference -- Copyright (c) 1994 Altera Corporation ENTITY counters IS PORT ( d : IN INTEGER RANGE 0 TO 255; clk : IN BIT; clear
·
www.eeworm.com/read/419990/10824323

c fdtd.c

/* FTDT - calculater - main program*/ #include #include #include #include #include #include #include "engine.h" #define BUFSIZE 256 /
·