代码搜索结果
找到约 10,000 项符合
Digital 的代码
digital_pll.h
//
// File = digital_pll.h
//
#ifndef _DIGITAL_PLL_H_
#define _DIGITAL_PLL_H_
#include "signal_T.h"
#include "anlg_filt_iir.h"
class DigitalPLL : public PracSimModel
{
public:
Digi
digital_pll.cpp
//
// File = digital_pll.cpp
//
#include "parmfile.h"
#include "misdefs.h"
#include "model_error.h"
#include "digital_pll.h"
#include "butt_filt_iir.h"
#include "model_graph.h"
extern Parm
digital clock (2).asm
S_SET BIT P1.0 ;数字钟秒控制位
M_SET BIT P1.1 ;分钟控制位
H_SET BIT P1.2 ;小时控制位
SECOND EQU 30H
MINUTE EQU 31H
HOUR EQU 32H
TCNT EQU 34H
ORG 00H
SJMP START
ORG 0BH
LJMP IN
digital_filtering.mdl
Model {
Name "digital_filtering"
Version 6.0
GraphicalInterface {
NumRootInports 0
NumRootOutports 0
ParameterArgumentNames ""
ComputedModelVersion "1.3
digital_clk.qpf
# Copyright (C) 1991-2004 Altera Corporation
# Any megafunction design, and related netlist (encrypted or decrypted),
# support information, device programming or simulation file, and any oth
digital_clk.pin
-- Copyright (C) 1991-2004 Altera Corporation
-- Any megafunction design, and related netlist (encrypted or decrypted),
-- support information, device programming or simulation file, and a
digital_clk.qws
[ProjectWorkspace]
ptn_Child1=Frames
ptn_Child2=Workmode
ptn_Child3=ActionPoints
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
pt
digital_clk.cdf
/* Quartus II Version 4.0 Build 190 1/28/2004 SJ Full Version */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(EPF10K10L84) Path("I:/VHDL/myprg/digit