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[ProjectWorkspace] ptn_Child1=Frames [ProjectWorkspace.Frames] ptn_Child1=ChildFrames [ProjectWorkspace.Frames.ChildFrames] ptn_Child1=Document-0 ptn_Child2=Document-1 ptn_Child3=Document-2 [P

# Copyright (C) 1991-2004 Altera Corporation # Any megafunction design, and related netlist (encrypted or decrypted), # support information, device programming or simulation file, and any oth

/* Quartus II Version 4.2 Build 157 12/07/2004 SJ Full Version */ JedecChain; FileRevision(JESD32A); DefaultMfr(6E); P ActionCode(Cfg) Device PartName(EPM3128AT100) Path("") File("Digital6

Analysis & Synthesis report for digital_clk Thu Dec 25 14:27:17 2008 Version 4.0 Build 190 1/28/2004 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Le

Flow report for digital_clk Thu Dec 25 14:27:26 2008 Version 4.0 Build 190 1/28/2004 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2.

-------------------------------------------------------------------------------------- Timing Analyzer Summary --------------------------------------------------------------------------------------

--K71_cs_buffer[4] is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC6_C21 --operation mode is arithmetic K

Assembler report for digital_clk Thu Dec 25 14:27:24 2008 Version 4.0 Build 190 1/28/2004 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice

--K71_cs_buffer[4] is lpm_divide:i_rtl_8|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] --operation mode is arithmetic K71_cs_buffe