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Digital 的代码
digital clock (1).hex
:0300000002007D7E
:10000B00C0D0C0E0E544700215431544E5434544B8
:10001B0070247543277544100542E542B43C1775AF
:10002B0042000541E541B43C0D7541000540E540FA
:10003B00B41803754000D0E0D0D0327FFFDFFEDE76
:
digital clock (1).plg
礦ision3 Build Log
Project:
F:\Proteus书稿\MCS-51 Demonstration\Chapter 8\61 Digital Clock (1)\Digital Clock (1).uv2
Project File Date: 08/04/2006
Outp
digital clock (1).lst
A51 MACRO ASSEMBLER DIGITAL_CLOCK__1_ 09/01/2006 16:57:35 PAGE 1
MACRO ASSEMBLER A51 V8.00
OBJECT MODULE PLACED IN Digital Clock (1).OBJ
digital clock (1).opt
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm {
digital clock (1).lnp
"Digital Clock (1).obj"
TO "Digital Clock (1)"
digital clock (1).asm
LEDBUF EQU 30H ;显示码缓存区
HOUR EQU 40H
MINUTE EQU 41H
SECOND EQU 42H
C100us EQU 43H
TICK EQU 10000 ;置中断次数
T100us EQU 256-100 ;置定时器初始值
LJMP START ;跳转至主程序
ORG 000BH ;定时器
digital_models.deck
Digital models
*
* This circuit contains a nand gate oscillator enabled by
* a pulse input after 20nS. Node 1 is an analog node.
* Nodes 2 and 3 are digital nodes.
*
.tran 1e-8 1e-7
*
v1 1 0 0.0 puls
digital_invert.deck
Digital inversions
*
.tran 1e-8 1e-6
*
v1 1 0 0.0 pulse(0 1 0 1e-8 1e-8 0.25e-6 0.5e-6)
r1 1 0 1k
*
a1 [1] [2] adc
.model adc adc_bridge
*
a2 2 3 inv
a3 2 ~4 inv
a4 ~2 5 inv
a5 ~2 ~6 inv
.model in
digital source.set
[General]
Version=1.0
Config=0
ReleaseIntermediate=.\Release
ReleaseOutput=.\Release
DebudIntermediate=.\Debug
DebugOutput=.\Debug
BodyName=SPCE060A_061A
[SetLink]
ExeFile=1
Output=Digital
digital source.spj
#Sunplus Debeloper Project File - Name = SunplusIDE
#Sunplus Developer Generated Build File Format Version V1.00
#**DO NOT EDIT**
#TARTYPE (SPCE060A_061A)Application
CFG=Debug
# Begin Project