代码搜索：Digit
找到约 4,689 项符合「Digit」的源代码
代码结果 4,689
www.eeworm.com/read/164942/10081191
vhd bcdadd.vhd
--bcdadd.vhd 1 digit bcd adder
library ieee ;
use ieee.std_logic_1164.all;
use work.components.all;
entity bcdadd is
port(
a : in std_logic_vector(3 downto 0);--砆
www.eeworm.com/read/275690/10801258
vhd bcdadd.vhd
--bcdadd.vhd 1 digit bcd adder
library ieee ;
use ieee.std_logic_1164.all;
use work.components.all;
entity bcdadd is
port(
a : in std_logic_vector(3 downto 0);--砆
www.eeworm.com/read/274276/10879383
vhd bcdadd.vhd
--bcdadd.vhd 1 digit bcd adder
library ieee ;
use ieee.std_logic_1164.all;
use work.components.all;
entity bcdadd is
port(
a : in std_logic_vector(3 downto 0);--砆
www.eeworm.com/read/454493/7388303
vhd bcdadd.vhd
--bcdadd.vhd 1 digit bcd adder
library ieee ;
use ieee.std_logic_1164.all;
use work.components.all;
entity bcdadd is
port(
a : in std_logic_vector(3 downto 0);--砆
www.eeworm.com/read/449123/7518019
m lu_sp_fl.m
function [A, ipivt, iflag] = lu_sp_fl( A, m, arith );
%
% LU_SP_FL computes the LU--decomposition with SIMPLE
% pivoting of an N by N matrix A.
% All operations are done using m-digit floating poi
www.eeworm.com/read/449123/7518020
m lu_pp_fl.m
function [A, ipivt, iflag] = lu_pp_fl( A, m, arith );
%
% LU_PP_FL computes the LU--decomposition with partial
% pivoting of an N by N matrix A.
% All operations are done using m-digit floating p
www.eeworm.com/read/442005/7661386
c sblcd_hpa449_sblcd.c
/* -*- c -*- */
/* Code for driving the lcd on the HPA449 */
/* HPA449 LCD config:
- Segment 0 used for turning off unused segments. Normally off.
- Antenna and alpha digit 7 tied to S1. Normall
www.eeworm.com/read/435744/7786002
vhd bcdadd.vhd
--bcdadd.vhd 1 digit bcd adder
library ieee ;
use ieee.std_logic_1164.all;
use work.components.all;
entity bcdadd is
port(
a : in std_logic_vector(3 downto 0);--砆
www.eeworm.com/read/139119/13187624
c sblcd_hpa449_sblcd.c
/* -*- c -*- */
/* Code for driving the lcd on the HPA449 */
/* HPA449 LCD config:
- Segment 0 used for turning off unused segments. Normally off.
- Antenna and alpha digit 7 tied to S1. Normall
www.eeworm.com/read/240876/13189812
vhd bcdadd.vhd
--bcdadd.vhd 1 digit bcd adder
library ieee ;
use ieee.std_logic_1164.all;
use work.components.all;
entity bcdadd is
port(
a : in std_logic_vector(3 downto 0);--砆