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Design 的代码
a_filter_design.m
% Design filter by specifying delay in units and
% looking at mag and phase response
% Good default values for fft_size = 128 and num_carriers = 32
delay_1 = 6; % 6
attenuation_1 = 0.35; %
a_filter_design.m
% Design filter by specifying delay in units and
% looking at mag and phase response
% Good default values for fft_size = 128 and num_carriers = 32
delay_1 = 6; % 6
attenuation_1 = 0.35; %
sys_design.m
%sys_design is the function used in CtrlLAB for administrating system design tasks.
%
%Available Design Tasks are:
%
% 1 for lead/lag compensator design
% 2 for LQ optimal regulator/controller