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# Copyright (C) 1991-2006 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

[ProjectWorkspace] ptn_Child1=Frames [ProjectWorkspace.Frames] ptn_Child1=ChildFrames [ProjectWorkspace.Frames.ChildFrames] ptn_Child1=Document-0 ptn_Child2=Document-1 ptn_Child3=Document-2 pt

--output design --v0.1 library ieee; use ieee.std_logic_1164.all; entity output_design is port( sout0: in std_logic; sout1: in std_logic; sout2: in std_logic; sout3: in std_logic

Version 6.0 Build 178 04/27/2006 SJ Full Version 39 2097 OFF OFF OFF OFF OFF FV_OFF Level2 0 0 VRSM_ON VHSM_ON 0 -- Start Partition -- -- End Partition -- -- Start Library Paths -- -

-- Copyright (C) 1991-2006 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and a

Fri Oct 06 15:29:37 2006

### uVision2 Project, (C) Keil Software ### Do not modify ! cExt (*.c) aExt (*.s*; *.src; *.a*) oExt (*.obj) lExt (*.lib) tExt (*.txt; *.h; *.inc) pExt (*.plm) CppX (*.cpp) DaveTm {