代码搜索结果

DE2_Tv ------ This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2

Sample Waveforms for lpm_counter0.vhd Sample behavioral waveforms for design file lpm_counter0.vhd The following wavefo

Release 8.2i Map I.31 Xilinx Mapping Report File for Design 'FIFO' Design Information ------------------ Command Line : C:\Xilinx\bin\nt\map.exe -ise C:/Xilinx/digi/lab3/lab3.ise -intstyle ise -p

%% Design of Multistage Decimators % This demo shows how to get progressively more efficient designs for % decimators given a set of design specifications. We start with a % single-section polyphase d

Sample Waveforms for lpm_fifo0.v Sample behavioral waveforms for design file lpm_fifo0.v The following waveforms show t

Sample Waveforms for LPM_ADD.v Sample behavioral waveforms for design file LPM_ADD.v The following waveforms show the b

[gif] Design Entry Utilities=true Place & Route=true User Constraints=true Implement Design=true [giftest.vhd] ModelSim Simulator=true

This is under the GPL. See file COPYING. This design implements the Twofish cipher for 128 and 192 bit keys. Read the manual for further details. Happy VHDLing! - spyros

Obj: "D:\unSPIDE1.8.2\unSPIDE\startupD.obj" Obj: "G:\Electronic\MCU\SPCE061A\My Design\show_Timer_last\Debug\Resource.obj" Obj: "G:\Electronic\MCU\SPCE061A\My Design\show_Timer_last\Debug\main.obj"

Version: 3.0 Options: m37 Obj: "D:\unSPIDE1.8.2\unSPIDE\startupD.obj" Obj: "G:\Electronic\MCU\SPCE061A\My Design\show_Timer_last\Debug\Resource.obj" Obj: "G:\Electronic\MCU\SPCE061A\My Design\show