代码搜索：DPLL
找到约 321 项符合「DPLL」的源代码
代码结果 321
www.eeworm.com/read/226015/14503143
pdf dpll.pdf
www.eeworm.com/read/8651/149405
doc dpll.doc
www.eeworm.com/read/248679/12547583
vhd dpll.vhd
module dpll(reset,clk,signal_in,signal_out,syn);
parameter para_K=4;
parameter para_N=16;
input reset;
input clk;
input signal_in;
output signal_out;
output syn;
reg signal_out;
reg dpout;
r
www.eeworm.com/read/248673/12547762
vhd dpll.vhd
module dpll(reset,clk,signal_in,signal_out,syn);
parameter para_K=4;
parameter para_N=16;
input reset;
input clk;
input signal_in;
output signal_out;
output syn;
reg signal_out;
reg dpout;
r
www.eeworm.com/read/132772/14073881
cmd dpll.cmd
/***************************************************************************/
/* Linker Command File - Memory Specification for TMS320F2407 */
/* to be updated fo
www.eeworm.com/read/132772/14073888
asm dpll.asm
*********************************************************************
* DPLL.asm: TMS320F2407 implementation of digital phase-locked loops
* for C2000 CCS simulator
*---------------------
www.eeworm.com/read/132772/14073928
c dpll.c
/*****************************************************************
* dpll.C - C program simulation of DPLL using a nonlinear median
* filter and a linear lowpass filter
*****************
www.eeworm.com/read/191974/8413731
rpt dpll.sim.rpt
Simulator report for dpll
Tue Feb 27 13:28:00 2007
Version 6.0 Build 178 04/27/2006 SJ Full Version
---------------------
; Table of Contents ;
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1. Legal Notice
2.
www.eeworm.com/read/191974/8413747
rpt dpll.tan.rpt
Timing Analyzer report for dpll
Tue Feb 27 13:17:45 2007
Version 6.0 Build 178 04/27/2006 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
www.eeworm.com/read/191974/8413751
summary dpll.map.summary
Analysis & Synthesis Status : Successful - Tue Feb 27 13:17:24 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : dpll
Top-level Entity Name : dpll
Family : Stratix