代码搜索：DPA
找到约 133 项符合「DPA」的源代码
代码结果 133
www.eeworm.com/read/260612/4330231
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixgx_dpa_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
use_coreclock_in
www.eeworm.com/read/321790/13398995
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/109242/6175662
in makefile.in
TOPSRCDIR = @top_srcdir@
TOPOBJDIR = ../../..
SRCDIR = @srcdir@
VPATH = @srcdir@
TESTDLL = comctl32.dll
IMPORTS = comctl32
CTESTS = \
dpa.c
@MAKE_TEST_RULES@
### Dependencies:
www.eeworm.com/read/14022/292117
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/17761/756500
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/17761/756805
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/17761/757180
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/17761/757556
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/18434/789214
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st
www.eeworm.com/read/338256/3319160
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity stratixii_lvds_rx is
generic(
number_of_channels: integer := 1;
deserialization_factor: integer := 4;
enable_dpa_mode : st