代码搜索:CycloneII

找到约 4,731 项符合「CycloneII」的源代码

代码结果 4,731
www.eeworm.com/read/467464/1501821

00 de2_board.ptf.5.00

SYSTEM DE2_Board { System_Wizard_Version = "5.00"; System_Wizard_Build = "168"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/467464/1501867

ptf de2_board.ptf

SYSTEM DE2_Board { System_Wizard_Version = "5.10"; System_Wizard_Build = "176"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/467464/1501902

00 de2_board.ptf.5.00

SYSTEM DE2_Board { System_Wizard_Version = "5.00"; System_Wizard_Build = "168"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/467464/1501928

ptf de2_board.ptf

SYSTEM DE2_Board { System_Wizard_Version = "5.10"; System_Wizard_Build = "176"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/467464/1501963

00 de2_board.ptf.5.00

SYSTEM DE2_Board { System_Wizard_Version = "5.00"; System_Wizard_Build = "168"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/467464/1501996

ptf de2_board.ptf

SYSTEM DE2_Board { System_Wizard_Version = "5.10"; System_Wizard_Build = "176"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/467464/1502031

00 de2_board.ptf.5.00

SYSTEM DE2_Board { System_Wizard_Version = "5.00"; System_Wizard_Build = "168"; WIZARD_SCRIPT_ARGUMENTS { device_family = "CYCLONEII"; clock_freq = "50000000"; g
www.eeworm.com/read/466574/1510283

vhd _primary.vhd

library verilog; use verilog.vl_types.all; entity cycloneii_mac_out is generic( dataa_width : integer := 1; output_clock : string := "none"; lpm_hint : strin
www.eeworm.com/read/466574/1510289

vhd _primary.vhd

library verilog; use verilog.vl_types.all; entity cycloneii_lcell_comb is generic( lut_mask : integer := 65535; sum_lutc_input : string := "datac"; lpm_type
www.eeworm.com/read/466574/1510294

vhd _primary.vhd

library verilog; use verilog.vl_types.all; entity cycloneii_asynch_io is generic( operation_mode : string := "input"; bus_hold : string := "false"; open_drain_out