代码搜索:Convert

找到约 10,000 项符合「Convert」的源代码

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vhd convert.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; use IEEE.STD_LOGIC_ARITH.ALL; entity convert is PORT( Scan : in STD_LOGIC_VECTOR(7 DOWNTO 0); pr
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c convert.c

/* convert.c -- automatic type conversions */ #include int main(void) { char ch; int i; float fl; fl = i = ch = 'C'; /* line 9 */
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class convert.class

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java convert.java

public class Convert implements Action { private String type; private String fromId; private String toId; public Convert(String _type, String _fromId, String _toId) { type = _type;
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vbw convert.vbw

frmConvert = 10, 48, 525, 445, , 88, 88, 603, 485, C
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vbp convert.vbp

Type=Exe Form=Form1.frm Reference=*\G{00020430-0000-0000-C000-000000000046}#2.0#0#C:\WINNT\System32\STDOLE2.TLB#OLE Automation IconForm="frmConvert" Startup="frmConvert" Command32="" Name="Proje
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c convert.c

/* * Copyright 2003 by Texas Instruments Incorporated. * All rights reserved. Property of Texas Instruments Incorporated. * Restricted rights to use, duplicate or disclose this code are *
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v convert.v

module convert ( scan, prepared, clr, data ); input [7:0] scan; input prepared; input clr; output [7:0] data; reg [7:0] tmpASCII; reg [7:0] ASCII; reg
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bsf convert.bsf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
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vhd convert.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; use IEEE.STD_LOGIC_ARITH.ALL; entity convert is PORT( Scan : in STD_LOGIC_VECTOR(7 DOWNTO 0); pr