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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/368386/2818923

h vic.h

/* $Id$ * * vic.h: Various VIC controller defines. The VIC is an interrupt controller * used in Baget/MIPS series. * * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov */ #ifndef _MIPS_V
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do wave.do

onerror {resume} quietly WaveActivateNextPane {} 0 add wave -noupdate -format Logic /testbench/test_controller/clk add wave -noupdate -format Logic /testbench/test_controller/reset add wave -noupd
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www.eeworm.com/read/357083/3029761

h vic.h

/* $Id$ * * vic.h: Various VIC controller defines. The VIC is an interrupt controller * used in Baget/MIPS series. * * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov */ #ifndef _MIPS_V
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www.eeworm.com/read/354345/3078218

h hdreg.h

/* * This file contains some defines for the AT-hd-controller. * Various sources. Check out some definitions (see comments with * a ques). */ #ifndef _HDREG_H #define _HDREG_H /* Hd controller re
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www.eeworm.com/read/350657/3122937

h vic.h

/* $Id$ * * vic.h: Various VIC controller defines. The VIC is an interrupt controller * used in Baget/MIPS series. * * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov */ #ifndef _MIPS_V
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h vic.h

/* $Id$ * * vic.h: Various VIC controller defines. The VIC is an interrupt controller * used in Baget/MIPS series. * * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov */ #ifndef _MIPS_V
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h hdreg.h

/* * This file contains some defines for the AT-hd-controller. * Various sources. Check out some definitions (see comments with * a ques). */ #ifndef _HDREG_H #define _HDREG_H /* Hd controller re
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www.eeworm.com/read/256031/4370876

h classlist.h

CLASS(0000, "Non-VGA unclassified device") CLASS(0001, "VGA compatible unclassified device") CLASS(0100, "SCSI storage controller") CLASS(0101, "IDE interface") CLASS(0102, "Floppy disk controller") C
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h vic.h

/* * vic.h: Various VIC controller defines. The VIC is an interrupt controller * used in Baget/MIPS series. * * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov */ #ifndef _ASM_BAGET_VIC_
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www.eeworm.com/read/152843/5660539

c cpm2_pic.c

/* The CPM2 internal interrupt controller. It is usually * the only interrupt controller. * There are two 32-bit registers (high/low) for up to 64 * possible interrupts. * * Now, the fun starts.
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