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system.make
#################################################################
# Makefile generated by Xilinx Platform Studio
# Project:C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\PPC405_Xilinx_Virtex4_GCC\system.xmp
system.ucf
############################################################################
## This system.ucf file is generated by Base System Builder based on the
## settings in the selected Xilinx Board Definit
system.mhs
# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 10.1 Build EDK_K.15
# Sun Mar 30 11:39:33 2008
# Target Boa
system.xmp
#Please do not modify this file by hand
XmpVersion: 10.1
VerMgmt: 10.1
IntStyle: default
MHS File: system.mhs
MSS File: system.mss
NPL File: projnav/system.ise
Architecture: virtex4
Device: xc
system.mss
PARAMETER VERSION = 2.2.0
BEGIN OS
PARAMETER OS_NAME = standalone
PARAMETER OS_VER = 2.00.a
PARAMETER PROC_INSTANCE = ppc405_0
END
BEGIN PROCESSOR
PARAMETER DRIVER_NAME = cpu_ppc
system.make
#################################################################
# Makefile generated by Xilinx Platform Studio
# Project:E:\Dev\FreeRTOS\Demo\MicroBlaze\system.xmp
##############################
system.ucf
############################################################################
## This system.ucf file is generated by Base System Builder based on the
## settings in the selected Xilinx Board Definit
system.mhs
# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 7.1.2 Build EDK_H.12.5.1
# Sun Nov 13 16:46:19 2005
# Target
system.xmp
#Please do not modify this file by hand
XmpVersion: 7.1
IntStyle: default
MHS File: system.mhs
MSS File: system.mss
NPL File: projnav/system.ise
Architecture: virtex4
Device: xc4vfx12
Package: