代码搜索结果

ngdbuild -ise "C:/training/desperf/labs/synthesis/precision/vhdl/synth_lab" -intstyle ise -dd _ngo -nt timestamp -uc data_control.ucf -p xc4vlx15-sf363-12 data_control.edf data_control.ngd map -ise "

library ieee; use ieee.std_logic_1164.all; entity data_control_fsm is port ( clk : in std_logic; reset : in std_logic; next_ch : i

XILINX-XDB 0.1 STUB 0.1 ASCII XILINX-XDM V1.4 ###6712:XlxV32DM 3fe4 1a20eNq1W22P27ay/iuLg3483RVf9GYVBWRJ1qqRLVWSN+v7RfB6s6e5TTZBXnpucfPj7wyHsodeOS0ucALscOYh+cyIGlKk5PywPzz9rxDJD92bP95+fvvheXElrk

//_____________________________________________________________________________________ // This state machine creates the read enable for the channel FIFOs. It also creates the // output multiple

library ieee; use ieee.std_logic_1164.all; entity data_control_fsm is port ( clk : in std_logic; reset : in std_logic; next_ch : i

//_____________________________________________________________________________________ // This state machine creates the read enable for the channel FIFOs. It also creates the // output multiple

library ieee; use ieee.std_logic_1164.all; entity data_control_fsm is port ( clk : in std_logic; reset : in std_logic; next_ch : i

K 13 svn:eol-style V 6 native K 12 svn:keywords V 23 Author Date Id Revision END

K 13 svn:eol-style V 6 native K 12 svn:keywords V 23 Author Date Id Revision END