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Control 的代码
gen_control_reg.txt
The VHDL file gen_control_reg.vhd is reused from the SPDIF interface project.
Fetch the file spdif_interface/rtl/vhdl/gen_control_reg.vhd.
mc8051_control.prj
vhdl work "mc8051_p.vhd"
vhdl work "control_fsm.vhd"
vhdl work "control_mem.vhd"
vhdl work "mc8051_control.vhd"
control_mem_srr.htm
HDL Compiler: 0 errors, 1 warning, 4 notes - from log file e:\vhdl\f8051\control_mem.srr
Total: 0 errors, 1 warning, 4 notes
Running SPARTAN3
control_mem_flink.htm
Log File Links:
rpt_control_mem.areasrr
#### START OF AREA REPORT #####[
Part: XC3S200FT256-5 (Xilinx)
---------------------------------------------------------------------------
######## Utilization report for Top level view:
mc8051_control.vhd
-------------------------------------------------------------------------------
library IEEE;
library work;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.mc8051_p.all;
control_mem_compile.tcl
project -compile
control_mem_map.tcl
project -run
expert_pid_control.m
%Expert PID Controller
clear all;
close all;
ts=0.001;
sys=tf(5.235e005,[1,87.35,1.047e004,0]);
dsys=c2d(sys,ts,'z');
[num,den]=tfdata(dsys,'v');
u_1=0.0;u_2=0.0;u_3=0.0;
y_1=0;y_2=0;y_3=0