代码搜索:Compute

找到约 10,000 项符合「Compute」的源代码

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bak compute_region_mask.m.bak

%------------------------------------------------------------------------ %compute_region_mask %computes the region mask based on the energy image output by %fft_enhance_cubs.m %Usage: % msk = c
www.eeworm.com/read/425675/10337515

m ssd_compute_initial_params.m

function vparams = ssd_compute_initial_params(width, ... height, ... Pinitial, ... motion_model) % % vparams = compute_initial_para
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m ssd_compute_vparams_increment.m

function params_inc = ssd_compute_vparams_increment(current_params, ... initial_matrix, ... verror, ... motion_model) % % - cur
www.eeworm.com/read/161485/10404533

m compute_symmetric_conditional_histogram.m

function H = compute_symmetric_conditional_histogram(x, x_cond, p, pc) % compute_symmetric_conditional_histogram - compute a symmetric histogram % % H = compute_symmetric_conditional_histogram(
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m compute_partial_product_hex.m

coef=[-524 459 -236 9 -20 41 -76 133 -221 354 -545 815 -1190 1705 -2420 3437 -4978 7614 -13457 41569 41569 -13457 7614 -4978 3437 -2420 1705 -1190 815 -545 354 -221 133 -76 41 -20 9 -236 459 -524]; N
www.eeworm.com/read/416926/11009349

vhd fltr_compute_h2.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity fltr_compute_h2 is port( clk: in std_logic; din : std_logic_vector(55 downto 0); d
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vhd fltr_compute_h1.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity fltr_compute_h1 is port( clk: in std_logic; din : std_logic_vector(55 downto 0); d
www.eeworm.com/read/416926/11009404

vhd fltr_compute_f1.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity fltr_compute_f1 is port( clk: in std_logic; din : std_logic_vector(55 downto 0); d
www.eeworm.com/read/416926/11009445

vhd fltr_compute_f2.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity fltr_compute_f2 is port( clk: in std_logic; din : std_logic_vector(55 downto 0); d
www.eeworm.com/read/416926/11009498

vhd fltr_compute_f3.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity fltr_compute_f3 is port( clk: in std_logic; din : std_logic_vector(55 downto 0); d