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Clock 的代码
clock.qws
[ProjectWorkspace]
ptn_Child1=Frames
ptn_Child2=ActionPoints
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
clock.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any
clock.pin
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions,
clock.hif
Version 5.0 Build 148 04/26/2005 SJ Full Version
32
1595
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
0
# entity
counter60
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
clock.done
Fri Oct 27 22:10:57 2006
clock.qpf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any
clock.v
module clock (
clk,
rst,
out,
sel
);
input clk,rst;
output [7:0] out;
output [2:0] sel;
wire carry_sec,carry_min,carry_hour;
wire [3:0] out_to_decoder;
wire [7:0] out_sec,ou
clock.qws
[ProjectWorkspace]
ptn_Child1=Frames
ptn_Child2=ActionPoints
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
clock.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any