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Protel Design System Design Rule Check PCB File : Documents\YUKI_需要做板_2009_8_13\PL2303HX模块_带USB插座\PL2303HX模块_带USB插座.PCB Date : 7-Sep-2009 Time : 12:22:27 Processing Rule : Short-Circuit

Electronics Workbench Circuit File Version: 5 Charset: ANSI Description: "" EncryptionType: 2 UsingVectorGraphics: 0 /000@D0I0?4D

Electronics Workbench Circuit File Version: 5 Charset: ANSI Description: "" EncryptionType: 2 UsingVectorGraphics: 0 /000@D0I0?4D

Electronics Workbench Circuit File Version: 5 Charset: ANSI Description: "" EncryptionType: 2 UsingVectorGraphics: 0 /000@D0I0?4D

Electronics Workbench Circuit File Version: 5 Charset: ANSI Description: "" EncryptionType: 2 UsingVectorGraphics: 0 /000@D0I0?4D

*circuit defined as 2-port z-parameters *is terminated by impedances ZS and ZL. *Vin is the voltage of the source. *v2 is the output voltage of 2-port. vin i1 1/(ZS+z11) i1 i2 -z21/(z22+ZL) i2

* Figure 33.56 CMOS: Mixed-Signal Circuit Design * *#destroy all **#set temp=0 *#run *#let id1=mag(ac1.vd1#branch) *#let ig1=mag(ac1.vg#branch) *#let igain1=db(id1/ig1) **#set temp=25 **#run

* Figure 33.72 CMOS: Mixed-Signal Circuit Design * Vdd Vdd 0 DC 1.5 Vinp Vinp 0 DC 0.75 AC 1 *Vinm Vinm 0 DC 0.75 *.DC Vinp 0.74 0.76 1u RF Vout Vinm 100MEG CF Vinm 0 1 .AC dec 100 100 1G .o

* Figure 33.25 CMOS: Mixed-Signal Circuit Design * *#destroy all *#run *#plot Vout Vin M1 Vout Vin 0 0 nmos W=10 L=1 CL Vout 0 1pF .IC v(vout)=1.5 Vin Vin 0 DC 0 PULSE 0 1.5 2n .1n .t

* Figure 33.73 CMOS: Mixed-Signal Circuit Design * Vdd Vdd 0 DC 1.5 Vinp Vinp 0 DC 0.75 AC 1 *Vinm Vinm 0 DC 0.75 *.DC Vinp 0.74 0.76 1u RF Vout Vinm 100MEG CF Vinm 0 1 .AC dec 100 100 1G .o