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BOOT_AEL=../de/ael/boot UNBOOT_AEL_FUNC= INPUT_DATA_PATH=../circuit/data;../circuit/models DESIGN_KIT_NAME=MRF8P20100H_Level2_Rev1_DK DESIGN_KIT_ROOT=../ VERSION=Level2_Rev1 BIN_DIRECTORY=../bin

/*************************************************************** NAME: sleep.c DESC: Sleep mode test HISTORY: 08.24.2002:purnnamu LCDVFn is connected the analog circuit in LCD. So, th

Invalid number of inputs/outputs * * This circuit contains a simple gain block to demonstrate * that the simulator reports an error if the number of * connections on the code model is incorrect.

Supply ramping option * * This circuit demonstrates the use of the option * "ramptime" which ramps independent sources and the * capacitor and inductor initial conditions from * zero to their fi

Capacitor and inductor with natural initial conditions * * This circuit contains a capacitor and an inductor with * initial conditions on them. Each of the components * has a parallel resistor so

Electronics Workbench Circuit File Version: 5 Charset: ANSI Description: "Bootstrapped source-follower." EncryptionType: 1 UsingVectorGraphics: 0 /NBHGCKHJPGDHBHANPCHIBKDF JIEOEMBFLIDBBBBM

No. of Data Rows : 126 Circuit: VBIC Noise Scale Test Doing analysis at TEMP = 300.150000 and TNOM = 300.150000 VBIC Noise Scale Test ----------------------------------

No. of Data Rows : 91 Circuit: * Simulation of MESFET output conductance Doing analysis at TEMP = 300.150000 and TNOM = 300.150000 * Simulation of MESFET output conductance -----

No. of Data Rows : 61 Circuit: * DCFL GaAs MESFET Gate\ Doing analysis at TEMP = 300.150000 and TNOM = 300.150000 * DCFL GaAs MESFET Gate\ ------------------------------

Supply ramping option * * This circuit demonstrates the use of the option * "ramptime" which ramps independent sources and the * capacitor and inductor initial conditions from * zero to their fi